The present invention relates generally to a planarization process, and more particularly, to such a process for use in the manufacture of semiconductor structures.
A well known technique for creating dielectrically isolated integrated circuits through the use of oxidation is disclosed in U.S. Pat. No. 3,648,125, issued Mar. 7, 1972, assigned to the assignee of the present invention and hereby incorporated by reference. This commonly employed technique is often referred to as LOCOS (Local Oxidation Of Silicon).
Although the LOCOS technique provides a simple and effective means to dielectrically isolate semiconductor integrated circuits, use of this technique typically results in a topographical surface which is non-planar. In the case of silicon semiconductor material, the resulting non-planar structure on the surface is referred to as a "bird's head". Such a non-planar surface is undesirable for high density applications where the non-planar surface is further processed to include additional structure, e.g., metallization, thereon. For example, in such high density applications, the presence of the bird's head creates problems in defining photoresist and etching of thin films in subsequent process steps.
Current techniques to planarize the bird's head typically provide a planar layer of organic material, e.g., photoresist, over the bird's head which layer is subsequently etched, along with the underlying bird's head. The etching employs a dry etch which is intended to etch both materials at the same rate. The dry etch techniques are undesirable inasmuch as they require expensive equipment and provide a low wafer throughput. In addition, the dry etch technique is difficult to apply successfully as the etch rate typically exhibits non-uniformity across the wafer surface. Also, the dry etch process requires careful control inasmuch as the underlying silicon surface is easily damaged by the dry etch.
Accordingly, a general object of the present invention is to provide an improved planarization process.
Another object of the present invention is to provide such a process which does not require the use of a dry etch.
Another object of the present invention is to provide such a process which can be easily added to a conventional semiconductor fabrication procedure.
Another object of the present invention is to provide improved semiconductor structures made by such process.